The present invention relates to sensor processing, in particular image sensor processing.
Sensor data is typically a voltage or current signal that varies proportionally to a monitored property of a test subject (e.g., light, x-rays, etc.). One technique for measuring sensor signals is correlated double sampling (“CDS”), which effectively extracts desired signals in the presence of signal disturbances that may arise due to internal offset errors of a sensor circuit. In a CDS scheme, outputs from a sensor circuit are measured twice. The signal is measured first when the sensor circuit is set to a known condition without sensor content (e.g., a “reset” condition). The signal is measured again when the sensor circuit has reached an unknown condition with sensor content (e.g., sensor reading). The difference of the two values generally corresponds to the monitored property of the sensor.
CDS differencing, which is the subtraction of the two measured values, traditionally is performed by a differencing amplifier. FIG. 1 illustrates a traditional CDS structure. In FIG. 1, CDS1 and CDS2 capacitors store the respective first and second measured values. Each capacitor is coupled to a respective sample and hold amplifier SHA1, SHA2. The outputs of the SHA are coupled to a differencing amplifier via a resistor network (R1-R4). The differencing amplifier subtracts the measured values and amplifies the difference. A single-ended ADC (or a ground referenced ADC) then converts the difference to a digital value. The differencing amplifier, however, consumes significant area and power while adding noise and distortion to the process, which is not addressed by the CDS operation. Furthermore, the single ended ADC can also suffer from additional internal offsets.